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VLSI Projects - Front End Design

 

S.No	Code	VLSI IEEE 2016 Project Titles	Year	Abstract
01	WSV0010	Enhanced Memory Reliability Against Multiple Cell Upsets Using Decimal Matrix Code(IEEE 2016)	2016	Abstract
02	WSV0009	Single-Port SRAM-Based Transpose Memory with Diagonal Data Mapping for Large Size 2-D DCT/IDCT(IEEE 2016)	2016	Abstract
03	WSV0008	RTL Design and VLSI Implementation of an efficient Convolutional Encoder and Adaptive Viterbi Decoder(IEEE 2015)	2016	Abstract
04	WSV0007	Fast Radix-10 Multiplication Using Redundant BCD Codes(IEEE 2016)	2016	Abstract
05	WSV0006	Reliable Low-Power Multiplier Design Using Fixed-Width Replica Redundancy Block(IEEE 2016)	2016	Abstract
06	WSV0005	An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on Multilevel Conditional Probability(IEEE 2016)	2016	Abstract
07	WSV0004	An Optimized Modified Booth Re-coder for Efficient Design of the Add-Multiply Operator(IEEE 2016)	2016	Abstract
08	WSV0003	Design and Analysis of Approximate Compressors for Multiplication(IEEE 2016)	2016	Abstract
09	WSV0002	Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations(IEEE 2016)	2016	Abstract
10	WSV0001	High-Performance Hardware Implementation for RC4 Stream Cipher(IEEE 2015)	2016	Abstract

VLSI Projects - CMOS Design

 

S.No	Code	VLSI IEEE 2016 Project Titles	Year	Abstract
01	WCV0005	Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient Embedded Logic(IEEE-2015)	2016	Abstract
02	WCV0004	Scalable Digital CMOS Comparator Using a Parallel Prefix Tree(IEEE-2015)	2016	Abstract
03	WCV0003	Recursive Approach to the Design of a Parallel Self-Timed Adder(IEEE-2016)	2016	Abstract
04	WCV0002	Low-Power Pulse-Triggered Flip-Flop Design Based on a Signal Feed-Through Scheme(IEEE-2016)	2016	Abstract
05	WCV0001	Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator(IEEE-2016)	2016	Abstract

VLSI Projects Front End Design and CMOS Design

 

S.No	Code	VLSI IEEE 2015 Project Titles	Year	Abstract
01	VL0050	Test Patterns of Multiple SIC Vectors: Theory and Application in BIST Schemes	2015	Abstract
02	VL0049	Scalable Digital CMOS Comparator Using a Parallel Prefix Tree	2015	Abstract
03	VL0048	Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter With Low Adaptation-Delay	2015	Abstract
04	VL0047	A Method to Construct Low Delay Single Error Correction Codes for Protecting Data Bits Only	2015	Abstract
05	VL0046	Design and Implementation of an On-Chip Permutation Network for Multiprocessor System-On-Chip	2015	Abstract
06	VL0045	An Efficient De noising Architecture for Removal of Impulse Noise in Images	2015	Abstract
07	VL0044	Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops	2015	Abstract
08	VL0043	Measurement and Evaluation of Power Analysis Attacks on Asynchronous S-Box	2015	Abstract
09	VL0042	Low Voltage and Low Power Divide-By-2/3 Counter Design Using Pass Transistor Logic Circuit Technique	2015	Abstract
10	VL0041	Design of an Error Detection and Data Recovery Architecture for Motion Estimation Testing Applications	2015	Abstract
11	VL0040	Area-Time Efficient Scaling-Free CORDIC Using Generalized Micro-Rotation Selection	2015	Abstract
12	VL0039	A Low-Power Single-Phase Clock Multiband Flexible Divider	2015	Abstract
13	VL0038	Investigating the Impact of Logic and Circuit Implementation on Full Adder Performance	2015	Abstract
14	VL0037	A High-Accuracy Adaptive Conditional-Probability Estimator for Fixed-Width Booth Multipliers	2015	Abstract
15	VL0036	Separable Reversible Data-Hiding of Image	2015	Abstract
16	VL0035	Design of High Speed Vedic Multiplier using Vedic Mathematics Techniques	2015	Abstract
17	VL0034	Accumulator Based 3-Weight Pattern Generation	2015	Abstract
18	VL0033	On Modulo2^n+1 Adder Design	2015	Abstract
19	VL0032	Low-Error and Hardware-Efficient Fixed-Width Multiplier by Using the Dual-Group Minor Input Correction Vector to Lower Input Correction Vector Compensation Error	2015	Abstract
20	VL0031	High-Speed Architectures for Multiplication Using Reordered Normal Basis	2015	Abstract
21	VL0030	FFT Implementation with Fused Floating-Point Operations	2015	Abstract
22	VL0029	Efficient Majority Logic Fault Detection With Difference-Set Codes for Memory Applications	2015	Abstract
23	VL0028	An Efficient TCAM-Based Implementation of Multi-pattern Matching Using Covered State Encoding	2015	Abstract
24	VL0027	Low-Power Pulse-Triggered Flip-Flop Design With Conditional Pulse-Enhancement Scheme	2015	Abstract
25	VL0026	Low-Power and Area-Efficient Carry Select Adder	2015	Abstract
26	VL0025	Word-Level Finite Field Multiplier Using Normal Basis	2015	Abstract
27	VL0024	BIST-Based Fault Diagnosis for Read-Only Memories	2015	Abstract
28	VL0023	VLSI Characterization of the Cryptographic Hash Function BLAKE	2015	Abstract
29	VL0022	Efficient Design of a Hybrid Adder Using Quantum-Dot Cellular Automata	2015	Abstract
30	VL0021	Radix-8 Booth Encoded Modulo 2^n-1 Multipliers With Adaptive Delay for High Dynamic Range Residue Number System	2015	Abstract
31	VL0020	An Efficient Implementation of Floating Point Multiplier	2015	Abstract
32	VL0019	Memory Efficient Modular VLSI Architecture for High throughput and Low-Latency Implementation of Multilevel Lifting 2-D DWT	2015	Abstract
33	VL0018	Adiabatic Technique for Energy Efficient Logic Circuits Design	2015	Abstract
34	VL0017	SET D-Flip Flop Design for Portable Applications	2015	Abstract
35	VL0016	Reducing the Computation Time in (Short Bit-Width) Two’s Complement Multipliers	2015	Abstract
36	VL0015	Power-Efficient Explicit-Pulsed Dual-Edge Triggered Sense-Amplifier Flip-Flops	2015	Abstract
37	VL0014	High-Accuracy Fixed-Width Modified Booth Multipliers for Lossy Applications	2015	Abstract
38	VL0013	Efficient Pattern Matching Algorithm for Memory Architecture	2015	Abstract
39	VL0012	Design of Sequential Elements for Low Power Clocking System	2015	Abstract
40	VL0011	Design of Fixed-Width Multipliers With Linear Compensation Function	2015	Abstract
41	VL0010	A Digital CMOS Parallel Counter Architecture Based on State Look-Ahead Logic	2015	Abstract
42	VL0009	CMOS Full-Adders for Energy-Efficient Arithmetic Applications	2015	Abstract
43	VL0008	A Fast Locking All-Digital Phase-Locked Loop via Feed-Forward Compensation Technique	2015	Abstract
44	VL0007	A High Bit Rate Serial-Serial Multiplier With On-the-Fly Accumulation by Asynchronous Counters	2015	Abstract
45	VL0006	A Low-Cost VLSI Implementation for Efficient Removal of Impulse Noise	2015	Abstract
46	VL0005	Parallel and Pipeline Architectures for High-Throughput Computation of Multilevel 3-D DWT	2015	Abstract
47	VL0004	Hardware Implementation of RFID Mutual Authentication Protocol	2015	Abstract
48	VL0003	Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing	2015	Abstract
49	VL0002	Self-Test Techniques for Crypto-Devices	2015	Abstract
50	VL0001	Bit-Swapping LFSR and Scan-Chain Ordering : A Novel Technique for Peak and Average Power Reduction in Scan-Based BIST	2015	Abstract

Wiztech Automation Anna Nagar, Chennai, an ISO & IAO certified organization, has been for years enabling & supporting the engineering students by helping them to do their Final Year IEEE Projects, which are very essential and are the reflection of their academic performances all through their engineering course. Wiztech has been able to support and develop for students several of Final Year IEEE Projects covering various domains including VLSI projects. Under each domain Wiztech has several titles to offer, which make the students get interested in choosing the right titles for their Final Year IEEE Projects. Students looking for doing VLSI projects could choose from titles that Wiztech Automation provides. The conceptual and application based titles for VLSI projects are offered to the students, as a part of Final Year IEEE Projects. Wiztech has been able to understand the pulse of the students, their learning styles and the requirements to fulfill the gaps.

It has been therefore that Wiztech is among the top most training organizations offering training to Engineering students, Engineering Graduates and also the employed engineers in Industrial Automation - PLC SCADA DCS VFD HMI VLSI, AutoCAD, Embedded system, IT and Web designing and Web development. The engineering students look for completing their Final Year IEEE Projects under VLSI projects that would highlight their course of study. Wiztech has over the last one decade been providing high quality training - both conceptual and practical - with hands on experience - to bring out visible skills in the students of the institute.

Why Wiztech

Wiztech has been in the field of training the engineering students, graduates and those employed for almost one decade now. Wiztech, during these years of training, associated with cross section of engineering colleges in Chennai and also outside. Understanding of the engineering courses and the requirements thereof made Wiztech quite conversant with the demands of the engineering as a course of study. Final Year IEEE Projects (covering different domains including VLSI projects) and Mini projects are the essentials that every engineering student has to deal with.

Since selection of the projects and the clear knowledge about how to go about the projects are something the engineering students may find difficult to handle, Wiztech Automation effectively guides and supports them to finish their Final Year IEEE Projects. Wiztech thus found the opportunity in the said area to offer the role of a guide and support to the students of engineering to arrive at the domain and title of the VLSI projects under the Final Year IEEE Projects and Mini projects and to also complete them successfully offering the facilities, material and expert guidance.

In the last decade, Wiztech could help several engineering students in their Final Year IEEE Projects based activities. Wiztech has thus attained a position from where they can offer best of solutions to the engineering students. Engineering students would benefit much by seeking the support of Wiztech Automation, Chennai, for their Final Year IEEE Projects selecting the liked title under VLSI projects or any of the projects that they are expected to do.